Intel® Many Integrated Core Architecture (Intel® MIC Architecture) products give developers a key advantage: They run on standard, existing programming tools and methods.
Intel MIC Architecture combines many Intel® processor cores onto a single chip. Developers interested in programming these cores can use standard C, C++, and FORTRAN source code. The same program source code written for Intel® MIC Products can be compiled and run on a standard Intel® Xeon® processor. Familiar programming models remove training barriers, allowing the developer to focus on the problems rather than software engineering.
Consider the case of mapping Earth and satellite imagery in applications like Google Earth*. Creating the images requires clear, well-lit conditions. However, “backprojection”-based Synthetic Aperture Radar (SAR) computation can image Earth at night, through clouds and trees, and provides information on surface materials. It works by collecting radar data from planes circling areas, which is turned into an image through intense calculation. Using Intel Xeon processors and the Intel® Xeon Phi™ coprocessor, Intel Labs and others demonstrate potential for five times reduction in compute cost using “backprojection,” while also simplifying data collection through optimized flight paths and shape targeting.
Intel® Many Integrated Core Architecture (Intel® MIC Architecture) ushers in a new era of supercomputing speed, performance, and compatibility. Now developers can create platforms running at trillions of calculations per second using the fast and familiar Intel® Xeon® processor and Intel® Xeon Phi™ coprocessor based on the new architecture.
This is an exponential leap forward. Now that supercomputers have broken the petaflop barrier, Intel already foresees a combination of Intel Xeon processors and Intel Xeon Phi coprocessors surpassing the next big milestone: the exaflop or 1,000 petaflop barrier.
The first Intel® MIC Architecture-based products target segments and applications using highly parallel processing, including high-performance computing (HPC), workstations, and data centers.
The Intel MIC Architecture utilizes a high degree of parallelism in smaller, lower-power performance Intel® processor cores. The result is advanced performance on highly parallel applications.
While relatively few specialized applications today are highly parallel, they address a wide range of important issues—from climate change simulations and genetic analysis, to investment portfolio risk management, and the search for new energy sources.
The Intel® MIC Architecture project draws upon the great work of three research streams, including the 80-core Tera-Scale Computing Research Program, the Single-Chip Cloud Computer initiative, and the Intel® microarchitecture code name Larrabee Many-Core Visual Computing Project.
The result is a fundamentally new architecture that uses the same language, tools, compilers, and libraries as the Intel Xeon processor. Because Intel processors are used in nearly 80 percent of the world’s supercomputers programmers can continue to work in familiar territory when creating software for the Intel MIC Architecture.
Codenamed Knights Corner, Intel® MIC Architecture uses the 22-nanometer manufacturing process with transistor structures as small as 22 billionths of a meter, scaling to more than 50 Intel processing cores on a single chip. The Intel® Xeon Phi™ coprocessor is the first product based on Intel MIC Architecture, and it targets HPC segments such as oil exploration, scientific research, financial analyses, and climate simulation, among many others.