dbgcfg0

         
      
Module Instance Base Address Register Address
i_io48_hmc_mmr_io48_mmr 0xFFCFA000 0xFFCFA000

Offset: 0x0

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

cfg_dbg_mode

0x0

cfg_cmd_driver_sel

0x0

cfg_loopback_en

0x0

cfg_mmr_driver_sel

0x0

cfg_prbs_ctrl_sel

0x0

cfg_wdata_driver_sel

0x0

dbgcfg0 Fields

Bit Name Description Access Reset
8:5 cfg_dbg_mode
TBD
RW 0x0
4 cfg_cmd_driver_sel
TBD
RW 0x0
3 cfg_loopback_en
TBD
RW 0x0
2 cfg_mmr_driver_sel
TBD
RW 0x0
1 cfg_prbs_ctrl_sel
TBD
RW 0x0
0 cfg_wdata_driver_sel
TBD
RW 0x0