11 |
perpllfbslip |
If 1, the Peripheral PLL feedback cycle has slipped (CLKOUT frequency too low). This does not mean the PLL has lost lock, but the quality of the clock has degraded.
|
RW |
0x0 |
10 |
mainpllfbslip |
If 1, the Main PLL feedback cycle has slipped (CLKOUT frequency too low). This does not mean the PLL has lost lock, but the quality of the clock has degraded.
|
RW |
0x0 |
9 |
perpllrfslip |
If 1, the Peripheral PLL reference cycle has slipped (CLKOUT frequency too high). This does not mean the PLL has lost lock, but the quality of the clock has degraded.
|
RW |
0x0 |
8 |
mainpllrfslip |
If 1, the Main PLL reference cycle has slipped (CLKOUT frequency too high). This does not mean the PLL has lost lock, but the quality of the clock has degraded.
|
RW |
0x0 |
3 |
perplllost |
If 1, the Peripheral PLL has lost lock at least once since this bit was cleared. If 0, the Peripheral PLL has not lost lock since this bit was cleared.
|
RW |
0x0 |
2 |
mainplllost |
If 1, the Main PLL has lost lock at least once since this bit was cleared. If 0, the Main PLL has not lost lock since this bit was cleared.
|
RW |
0x0 |
1 |
perpllachieved |
If 1, the Peripheral PLL has achieved lock at least once since this bit was cleared. If 0, the Peripheral PLL has not achieved lock since this bit was cleared.
|
RW |
0x0 |
0 |
mainpllachieved |
If 1, the Main PLL has achieved lock at least once since this bit was cleared. If 0, the Main PLL has not achieved lock since this bit was cleared.
|
RW |
0x0 |