sbcfg0

         
      
Module Instance Base Address Register Address
i_io48_hmc_mmr_io48_mmr 0xFFCFA000 0xFFCFA05C

Offset: 0x5C

Access: RW

Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

cfg_rld3_refresh_seq1

0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

cfg_rld3_refresh_seq0

0x0

sbcfg0 Fields

Bit Name Description Access Reset
31:16 cfg_rld3_refresh_seq1
Banks to Refresh for RLD3 in sequence 1. Must not be more than 4 banks
RW 0x0
15:0 cfg_rld3_refresh_seq0
Banks to Refresh for RLD3 in sequence 0. Must not be more than 4 banks
RW 0x0