Module Instance | Base Address | Register Address |
---|---|---|
i_noc_mpu_m0_Probe_emacs_main_Probe | 0xFFD14400 | 0xFFD14420 |
Offset: 0x20
Access: RW
Bit Fields | |||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reserved |
|||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved |
TRACEALARMCLR RW 0x0 |
Bit | Name | Description | Access | Reset |
---|---|---|---|---|
2:0 | TRACEALARMCLR | Setting a bit to 1 in register TraceAlarmClr clears the corresponding bit in register TraceAlarmStatus.The number of bits in register TraceAlarmClr is equal to (nFilter + 1). When nFilter is set to 0, TraceAlarmClr is reserved.NOTE The written value is not stored in TraceAlarmClr. A read always returns 0. |
RW | 0x0 |