Niezbędne zasoby

Stan
Launched
Data rozpoczęcia
Q2'19
Litografia
10 nm

Zasoby

Logic Elements (LE)
2692760
Adaptive Logic Modules (ALM)
912800
Adaptive Logic Module (ALM) Registers
3651200
Fabric and I/O Phase-Locked Loops (PLLs)
28
Maximum Embedded Memory
259 Mb
Digital Signal Processing (DSP) Blocks
8528
Digital Signal Processing (DSP) Format
Fixed Point (hard IP), Floating Point (hard IP), Multiply, Multiply and Accumulate, Variable Precision
Hard Processor System (HPS)
Quad-core 64 bit Arm* Cortex*-A53
Hard Memory Controllers
Tak
External Memory Interfaces (EMIF)
DDR4, QDR IV

Dane techniczne I/O

Maximum User I/O Count
624
I/O Standards Support
1.2 V LVCMOS, 1.8 V LVCMOS, SSTL, POD, HSTL, HSUL, Differential SSTL, Differential POD, Differential HSTL, Differential HSUL, True Differential Signaling
Maximum LVDS Pairs
312
Maximum Non-Return to Zero (NRZ) Transceivers
24
Maximum Non-Return to Zero (NRZ) Data Rate
28.9 Gbps
Maximum Pulse-Amplitude Modulation (PAM4) Transceivers
12
Maximum Pulse-Amplitude Modulation (PAM4) Data Rate
57.8 Gbps
Transceiver Protocol Hard IP
PCIe Gen4, 10/25/100G Ethernet

Technologie zaawansowane

Hyper-Registers
Tak
FPGA Bitstream Security
Tak

Dane techniczne pakietu

Package Options
R2581A

Informacje dodatkowe

Adres URL dodatkowych informacji