alt_oct IP Core

On-chip termination (OCT) IP core. The alt_oct IP core provides support for the on-chip termination, and there is a shared configuration bus. This IP core is available for supported device (Arria^® series, and Stratix^® series) families.

Intel recommends instantiating this function with the IP Catalog.

Note:

For this IP core, the IP Catalog generates output files with multiple entities or modules. The top-level entity or module is located at the bottom of the file.
The alt_oct IP core is required to control arbitration logic necessary to dynamically configure OCT blocks in the design.
When you create your Intel^® FPGA IP, you can use the IP Catalog to generate a netlist for third-party synthesis tools.

Note: More information about the alt_oct IP core is available on the Altera website.