ID:23082 PCIe IP port '<pcie_ip_port_hpath>' at '<pcie_sys_freq>' in the half-clock adapter mode requires system clock frequency of '<2x_pcie_sys_freq>'. System clock frequency of '<sysclk_sys_freq>' for IP port '<sysclock_ip_port_hpath>', driving the system clock port of PCIe IP, does not meet this requirement.

CAUSE: Clock frequency inconsistency between protocol IP and system clock IP driving it.

ACTION: Make sure that the clock frequency setting is consistent between the system clock output and protocol IP clock input.