Timing Analyzer Collection Commands

author-image

By

The Timing Analyzer supports collection application program interfaces (APIs) that provide easy access to ports, pins, cells, or nodes in the design. You can use collection APIs with any valid constraints or tool command language (Tcl) commands specified in the Timing Analyzer.

Table 1 describes the collection commands supported by the Timing Analyzer.

For more information on collections, refer to the Timing Analyzer chapter or the SDC & Timing Analyzer API Reference Manual (PDF).

The following example shows various uses of the create_clock and create_generated_clock commands with collection commands.

# Create a simple 10 ns with clock with a 60 % duty cycle
create_clock -period 10 -waveform {0 6} -name clk [get_ports clk]
# The following multicycle applies to all paths ending at registers
# clocked by clk
set_multicycle_path -to [get_clocks clk] 2