Article ID: 000074079 Content Type: Troubleshooting Last Reviewed: 05/05/2021

Is there a known issue for the Intel® Stratix® 10 devices when SEU detection is enabled?

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    Users may encounter the Intel® Stratix® 10 devices not functioning as expected when reconfiguring the FPGA by toggling the nCONFIG low OR, via JTAG
    OR, when using Partial Reconfiguration (PR). 

    This issue may only occur if the design enables SEU detection on all configuration modes: i.e. ASx4, AVSTx8/x16/x32, JTAG

    Once the issue is observed:
    In the case of reconfiguration, you must power cycle the FPGA to recover. 
    In the case of PR, you can reconfigure the base design or power cycle the FPGA to recover.

    Resolution

    If SEU detection is not required, disable SEU detection

    If SEU detection is required, download and install the patch from the corresponding link below.
    Then, regenerate the bitstream (RBF/JIC/RPD/POF) with the existing SOF.
    Recompilation is NOT required.

    Patch for Intel® Quartus® Pro version 20.1: 
    Download the version 20.1 patch 0.46 for Windows (.exe)
    Download the version 20.1 patch 0.46 for Linux (.run)

    Patch for Intel® Quartus® Pro version 20.2: 
    Download the version 20.2 patch 0.47 for Windows (.exe)
    Download the version 20.2 patch 0.47 for Linux (.run)

    Patch for Intel® Quartus® Pro version 20.3: 
    Download the version 20.3 patch 0.08 for Windows (.exe)
    Download the version 20.3 patch 0.08 for Linux (.run) 

    This problem is fixed starting with the Intel® Quartus® Prime Pro Edition software version 20.4.

    Related Products

    This article applies to 1 products

    Intel® Stratix® 10 FPGAs and SoC FPGAs