Article ID: 000074574 Content Type: Troubleshooting Last Reviewed: 08/02/2017

Why some GPIOs of MAX10 drop Low level during using JTAG ISP, program .pof into internal flash ?

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    The reason is because of speedmode in MAX10. Basically, if you use Quartus Programmer to program MAX10 internal flash, it is not going through traditional JTAG ISP flow. In speedmode, a helper file will be first loaded into the MAX10 to help program the internal flash, which means that the GPIOs will follow the helper IP design and lead to drop low.

    Regarding the speedmode, it is the enhancement to improve the overall MAX10 programming time. It basically configures a helper file into CRAM and handles data transfer/programming. Since the MAX10 is in user mode during internal flash programming, so the GPIOs will not follow what ISP mode should be. Actually, GPIOs should be tri-state during JTAG ISP mode.

    Resolution

    The issue will be fixed in Quartus II 17.1.

    Related Products

    This article applies to 1 products

    Intel® MAX® 10 FPGAs