Article ID: 000076265 Content Type: Troubleshooting Last Reviewed: 09/27/2011

Stratix II GX Transceiver Transmitter Buffer Power Does Not Regenerate Correctly in a RapidIO IP Core

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    When you regenerate an existing RapidIO MegaCore function that uses the high-speed transceivers on a Stratix II GX device, the transmitter buffer power (VCCH) reverts to the default value of 1.2 V. The compiler complains about an invalid combination of I/O standard, common mode voltage, analog power voltage, and data rate.

    A design that contains one of the affected variations cannot compile successfully.

    Resolution

    To avoid this issue, perform the following workaround to regenerate the high-speed transceiver with the correct VCCH value:

    1. In the Quartus II software, on the Tools menu, click MegaWizard Plug-In Manager.
    2. In the MegaWizard Plug-In Manager, turn on Edit an existing custom megafunction variation.
    3. Click Next.
    4. In the File name field, select the file <RapidIO_instance_name>.v.
    5. Click Next.
    6. On the Physical Layer page, click Configure Transceiver.
    7. In the transceiver parameter editor, on the Tx Analog page, for What is the transmitter buffer power (VCCH)?, select the correct voltage.
    8. Click Finish.
    9. To regenerate the RapidIO MegaCore function high-speed transceiver with the issue resolved, click Finish.

    You can now compile your design without encountering this problem in your RapidIO MegaCore variation.

    This issue is fixed in version 10.0 SP1 of the RapidIO MegaCore function.

    Related Products

    This article applies to 1 products

    Stratix® II FPGAs