Article ID: 000078115 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Why is there a mismatch on user I/O pin count between the Arria II GX device handbook and the Quartus II software?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

The Arria® II GX device user I/O pin count in the Quartus® II software which can be found in the "Assignments > Settings" menu do not match the total I/O pins reported in I/O Features in Arria II GX Devices (PDF). The handbook only reports I/O pins dedicated clock pins while Quartus II software reports all pins - user I/O pins, clock pins, and transceiver pins.

For example, the handbook lists 252 I/O pins for the EP2AGX45 F572 while the Quartus II software shows 292 pins for the same device. The calculation is shown below:

The EP2AGX45 F572 device has two transceiver banks in the device; hence, the transceiver banks have 8 Tx pairs 8 Rx pairs 4 refclk pairs. Thus, the Quartus II software will report total I/O pins = 292 pins = 252 ((8 8 4)  x 2).

Related Products

This article applies to 1 products

Arria® II GX FPGA