pin_perst is the power-on reset to the FPGA board. It is provided by the PCIe® slot for the add-in card system and driven by user logic in the embedded system. You should NOT disable pin_perst as this signal is equivalent to power on reset to the core.
For the add-in card, PCIe spec requires that this signal must be asserted for at least 100ms after power is stable. When it is deasserted, refclk must be stable. For the embedded system, users have a full controll over their reset sequence.
npor behaves very much the same as pin_perst except that it also is driven by soft reset. For subsequence resets, it does not need to obey the minimum of 100ms assertion after power-up because refclk is already stable.
npor is the function of both pin_perst and user soft reset. When pin_perst is asserted, npor must be active.
During normal operation when refclk is already stable, npor can be controlled by user's soft reset to reset the PCIe core if neccessary.