Article ID: 000078863 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Do the active serial (AS) configuration pins on a Stratix V device tri-state after the device enters user mode?

Environment

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Description No, the AS configuration pins on a Stratix® V device will not tri-state once the device enters user mode. The AS configuration pins will only be tri-stated when the device is in reset.
Resolution To tri-state the AS configuration pins drive nCE high and nCONFIG low.  This will hold the FPGA in reset.

Related Products

This article applies to 4 products

Stratix® V GS FPGA
Stratix® V E FPGA
Stratix® V GT FPGA
Stratix® V GX FPGA