Article ID: 000080918 Content Type: Troubleshooting Last Reviewed: 03/21/2013

Why does Fitter report error when assigning nPERSTL1 pin to pcie_rstn input of the PCIe Hard IP core for 5CGXFC3 device family?

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    Due to a PCIe® HardIP connectivity bug in Quartus® II software version v12.1 SP1, an error message of the following format shown below will be seen:

    Error (175019): Illegal constraint of I/O pad to the location <PIN_LOCATION>
     Info (175028): The I/O pad name: pcie_rstn
     Error (10104): Unable to find a path between I/O pad and PINPERST port of PCI Express Hard IP.
      Error (10151): "<PIN_LOCATION>" is not a legal location for "I/O pad" connected to PINPERSTN of PCI Express Hard IP.
      Info (175029): 1 location affected
       Info (175029): <PIN_LOCATION>
    Error (175001): Could not place Hard IP
     Info (175028): The Hard IP name: <Instant>|altpcie_cv_hip_avmm_hwtcl:pcie_cv_hip_avmm_0|altpcie_cv_hip_ast_hwtcl:c5_hip_ast|altpcie_av_hip_ast_hwtcl:altpcie_av_hip_ast_hwtcl|altpcie_av_hip_128bit_atom:altpcie_av_hip_128bit_atom|arriav_hd_altpe2_hip_top
     Error (175006): Could not find path between source HSSI RX PLD PCS Interface and the Hard IP
      Info (175026): Source: HSSI RX PLD PCS Interface ep_g1x4:u0|altpcie_cv_hip_avmm_hwtcl:pcie_cv_hip_avmm_0|altpcie_cv_hip_ast_hwtcl:c5_hip_ast|altpcie_av_hip_ast_hwtcl:altpcie_av_hip_ast_hwtcl|altpcie_av_hip_128bit_atom:altpcie_av_hip_128bit_atom|av_xcvr_pipe_native_hip:g_pcie_xcvr.av_xcvr_pipe_native_hip|av_xcvr_native:inst_av_xcvr_native|av_pcs:inst_av_pcs|av_pcs_ch:ch[0].inst_av_pcs_ch|av_hssi_rx_pld_pcs_interface_rbc:inst_av_hssi_rx_pld_pcs_interface|wys
      Error (175022): The HSSI RX PLD PCS Interface could not be placed in any location to satisfy its connectivity requirements
      Error (175022): The Hard IP could not be placed in any location to satisfy its connectivity requirements

    Resolution This issue will be fixed in Quartus II software version v13.0.

    Related Products

    This article applies to 1 products

    Cyclone® IV GX FPGA