The PCI Express High-Performance Reference Design highlights the performance of Intel’s PCI Express* products. The design includes a high-performance chaining direct memory access (DMA) that transfers data between the a PCIe Endpoint in the FPGA, internal memory and the system memory. The reference design includes a Windows-based software application that sets up the DMA transfers. The software application also measures and displays the performance achieved for the transfers. This reference design enables you to evaluate the performance of the PCI Express protocol in Intel® Cyclone® 10 GX.
Intel offers the Intel® Cyclone® 10 GX Hard IP for PCI Express. The hard IP implementation is available as a Root Port or Endpoint. Depending on the device used, the hard IP implementation is compliant with PCI Express Base Specification 2.0, or 3.0.