Cyclone® V Hard Processor System Technical Reference Manual

ID 683126
Date 8/28/2023
Public
Document Table of Contents

16.3. Interface Signals

The quad SPI controller provides four chip select outputs to allow control of up to four external quad SPI flash devices. The outputs serve different purposes depending on whether the device is used in single, dual, or quad operation mode. The following table lists the I/O pin use of the quad SPI controller interface signals for each operation mode.

Table 161.  Interface Signals
Signal Mode Direction Function
data[0] Single Output Data output 0
Dual or quad Bidirectional Data I/O 0
data[1] Single Input Data input 0
Dual or quad Bidirectional Data I/O 1
data[2] Single or dual Output Active low write protect
Quad Bidirectional Data I/O 2
data[3] Single, dual, or quad Bidirectional Data I/O 3
ss_n[0] Single, dual, or quad Output Active low slave select 0
ss_n[1] Active low slave select 1
ss_n[2] Active low slave select 2
ss_n[3] Active low slave select 3
sclk Single, dual, or quad Output Serial Clock