SoC FPGA Embedded Development Suite (EDS) Standard Version 20.1 Release Notes

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ID 683202
Date 6/12/2020
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SoC FPGA Embedded Development Suite (EDS) Standard Version 20.1 Release Notes
SoC FPGA Embedded Development Suite (EDS) Standard Version 20.1 Release Notes x
New Features and Enhancements Tool Versions Known Issues SoC FPGA Embedded Development Suite Archives Revision History for SoC FPGA Embedded Development Suite (EDS) Release Notes
SoC FPGA Embedded Development Suite (EDS) Standard Version 20.1 Release Notes

Known Issues

Table 3.  Error when performing memory to memory transfer with non-flat virtual memory
Description: BareMetal application failed to perform memory to memory transfer with non-flat virtual memory.
Workaround: None
Table 4.   snprinf from newlib failed to print correctly on specifier with format %-*llu
Description: When using the function snprintf from newlib, the print out was not printed correctly when using the specifier with format %-*llu.
Workaround: None
Table 5.  L2 ECC not triggering after error is injected when new U-Boot is used
Description: This issue happens when we load the latest U-Boot to calibrate RAM before loading the BareMetal application; and ECC is not triggered when error is injected.
Workaround: None
Table 6.   alt_cache.c failed to write the control register 0xFFFEF108 when loaded with new U-Boot
Description: This issue happens when we load the latest U-Boot to calibrate RAM before loading the BareMetal application. The BareMetal application fails to write the control register (reg1_control, 0xFFFEF108) and causes the program to go into Abort Mode (ABT) mode.
Workaround: None
Table 7.   alt_cache.c failed to disable L1 data cache properly
Description: BareMetal application failed to disable L1 data cache.
Workaround: None
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