Video and Vision Processing Suite Intel® FPGA IP User Guide

ID 683329
Date 12/31/2023
Public

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Document Table of Contents
1. About the Video and Vision Processing Suite 2. Getting Started with the Video and Vision Processing IPs 3. Video and Vision Processing IPs Functional Description 4. Video and Vision Processing IP Interfaces 5. Video and Vision Processing IP Registers 6. Video and Vision Processing IPs Software Programming Model 7. Protocol Converter Intel® FPGA IP 8. 1D LUT Intel® FPGA IP 9. 3D LUT Intel® FPGA IP 10. AXI-Stream Broadcaster Intel® FPGA IP 11. Bits per Color Sample Adapter Intel FPGA IP 12. Black Level Correction Intel® FPGA IP 13. Black Level Statistics Intel® FPGA IP 14. Chroma Key Intel® FPGA IP 15. Chroma Resampler Intel® FPGA IP 16. Clipper Intel® FPGA IP 17. Clocked Video Input Intel® FPGA IP 18. Clocked Video to Full-Raster Converter Intel® FPGA IP 19. Clocked Video Output Intel® FPGA IP 20. Color Space Converter Intel® FPGA IP 21. Defective Pixel Correction Intel® FPGA IP 22. Deinterlacer Intel® FPGA IP 23. Demosaic Intel® FPGA IP 24. FIR Filter Intel® FPGA IP 25. Frame Cleaner Intel® FPGA IP 26. Full-Raster to Clocked Video Converter Intel® FPGA IP 27. Full-Raster to Streaming Converter Intel® FPGA IP 28. Genlock Controller Intel® FPGA IP 29. Generic Crosspoint Intel® FPGA IP 30. Genlock Signal Router Intel® FPGA IP 31. Guard Bands Intel® FPGA IP 32. Histogram Statistics Intel® FPGA IP 33. Interlacer Intel® FPGA IP 34. Mixer Intel® FPGA IP 35. Pixels in Parallel Converter Intel® FPGA IP 36. Scaler Intel® FPGA IP 37. Stream Cleaner Intel® FPGA IP 38. Switch Intel® FPGA IP 39. Tone Mapping Operator Intel® FPGA IP 40. Test Pattern Generator Intel® FPGA IP 41. Unsharp Mask Intel® FPGA IP 42. Video and Vision Monitor Intel FPGA IP 43. Video Frame Buffer Intel® FPGA IP 44. Video Frame Reader Intel FPGA IP 45. Video Frame Writer Intel FPGA IP 46. Video Streaming FIFO Intel® FPGA IP 47. Video Timing Generator Intel® FPGA IP 48. Vignette Correction Intel® FPGA IP 49. Warp Intel® FPGA IP 50. White Balance Correction Intel® FPGA IP 51. White Balance Statistics Intel® FPGA IP 52. Design Security 53. Document Revision History for Video and Vision Processing Suite User Guide

36.2. Scaler IP Parameters

Table 584.  Scaler IP Parameters
Parameter Allowed range Description
Video data format
Lite mode On or off Turn on to use the lite variant of the Intel FPGA Streaming Video protocol.
Bits per color sample 8 to 16 Select the number of bits per color sample.
Number of color planes 1 to 4 Select the number of color planes per pixel.
Number of pixels in parallel 1 to 8 Select the number of pixels transmitted every clock cycle.
444 chroma sampling On or off Turn on to support scaling of 444 chroma sampled video data.
422 chroma sampling On or off Turn on to support scaling of 422 chroma sampled video data.
420 chroma sampling On or off Turn on to support scaling of 420 chroma sampled video data.
Disable flush/fill between frames On or off Turn on to turn off the flush and refill of the line buffer between frames.
Maximum input field width 1 to 65536 Set the maximum supported input field width. If you turn on horizontal partial scaling, the value in this parameter specifies the size of the internal line buffer. The value you specify should be the maximum number of pixels expected per line in the tile of the overall image that this scaler processes, including any overscan data.
Maximum output field width 1 to 65536 Set the maximum supported output field width. If Memory-mapped control interface is off, this value sets the fixed output field width. If you turn on horizontal partial scaling, this parameter sets the precision of the internal fixed-point arithmetic to calculate the pixel drop and repeat patterns. Set this value to the size of the maximum expected input or output image before tiling, which is the maximum overall input or output image width
Output Picture Height 1 to 65536 Set the height for the output fields. Only used if Memory-mapped control interface is off.
Control settings
Memory-mapped control interface On or off Turn on for the Avalon memory-mapped control agent interface and to allow run-time configuration via the register map. You must have the Avalon memory-mapped control agent interface if you turn on Lite mode.
Scaling
Scaling algorithm Nearest Neighbor, Bilinear, Polyphase Select the algorithm to resize the video fields
Edge behavior Replicate edge pixel or Mirror edge pixels Only with Polyphase. Controls which pixel values fill filter taps that otherwise are empty (as they are off-screen) when scaling around the edges of the image. Refer to Filter Behavior at Edge Boundaries
Runtime coefficient updates On or off Only with Polyphase. Turn on for updates to the scaling coefficients at run time via the Avalon memory-mapped control agent interface.
Initialize coefficients at startup On or off Only with Polyphase. Turn on to initialize the scaling coefficients to preset values at startup. Select the coefficient values in the Vertical coefficient function and Horizontal coefficient function parameters
Vertical scaling
Vertical scaling On or off Turn on for image resizing in the vertical direction
Vertical partial image scaling On or off Turn on for partial image scaling in the vertical direction
Mirror 420 chroma data On or off Only with 420 chroma sampling on. Turn on to reduce the memory resources required to implement the line buffer for scaling 420 sampled data (refer to 422 and 420 Chroma Sampled Data Scaling)
Number of vertical taps 1 to 64 Polyphase only. Set the number of vertical scaling filter taps
Number of vertical phases 2 to 256 Polyphase only. Set the number of vertical scaling filter phases
Number of vertical banks 1 to 16 Polyphase only. Set the number of vertical scaling filter coefficient banks
Use signed vertical coefficients On or off Polyphase only. Turn on to use signed coefficients for the vertical scaling filter
Vertical coefficient integer bits 0 to 17 Polyphase only. Set the number of integer bits used to represent the vertical scaling filter coefficients
Vertical coefficient fraction bits 1 to 18 Bilinear and polyphase only. Set the number of fraction bits to represent the vertical scaling filter coefficients
Fraction bits preserved between vertical and horizontal scaling 0 to vertical coefficient fraction bits Bilinear and polyphase only. Set the number of fraction bits to preserve in the intermediate result between the vertical and horizontal scaling pipelines
Vertical coefficient function Bicubic, Lanczos 1, Lanczos 2, Lanczos 3 or Lanczos 4 If you turn on Initialize coefficients at startup, select the function that calculates the initial vertical scaling coefficient values. If you also turn on Runtime coefficient updates, you can overwrite these values at run time.
Horizontal scaling
Horizontal scaling On or off Turn on for image resizing in the horizontal direction
Horizontal partial image scaling On or off Turn on for partial image scaling in the horizontal direction (see Partial Frame Scaling)
Half rate 420 On or off Turn on to specify that you supply only 420 chroma sampled data at data rates up to 50% of the maximum supported by the interface. Turning on reduces the hardware resources that the design requires (refer to 422 and 420 Chroma Sampled Data Scaling)
Number of horizontal taps 1 to 64 Polyphase only. Set the number of horizontal scaling filter taps
Number of horizontal phases 2 to 256 Polyphase only. Set the number of horizontal scaling filter phases
Number of horizontal banks 1 to 16 Polyphase only. Set the number of horizontal scaling filter coefficient banks
Use signed horizontal coefficients On or off Polyphase only. Turn on to use signed coefficients for the horizontal scaling filter
Horizontal coefficient integer bits 0 to 17 Polyphase only. Set the number of integer bits used to represent the horizontal scaling filter coefficients
Horizontal coefficient fraction bits 1 to 8 Bilinear and polyphase only. Set the number of fraction bits used to represent the horizontal scaling filter coefficients
Horizontal coefficient function Bicubic, Lanczos 1, Lanczos 2, Lanczos 3 or Lanczos 4 If you turn on Initialize coefficients at startup, select the function that calculates the initial vertical scaling coefficient values. If you also turn on Runtime coefficient updates, you can overwrite these values at run time.
General
Separate clock for control interface On or off Turn on for a separate clock for the control agent interface
Debug features On or off Turn on to read back writeable registers via the control agent interface
Pipeline ready signals On or off Turn on to add extra pipeline registers to the AXI4-S tready signals