LVDS SERDES Intel® FPGA IP Release Notes

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ID 683575
Date 4/08/2024
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LVDS SERDES Intel® FPGA IP Release Notes
LVDS SERDES Intel® FPGA IP Release Notes x
LVDS SERDES Intel FPGA IP (intel_lvds) v23.1.0 LVDS SERDES Intel FPGA IP (intel_lvds) v23.0.0 LVDS SERDES Intel FPGA IP v20.0.1 LVDS SERDES Intel FPGA IP v20.0.0 LVDS SERDES Intel FPGA IP v19.5.0 LVDS SERDES Intel FPGA IP v19.4.0 LVDS SERDES Intel FPGA IP v19.3.0 LVDS SERDES Intel® FPGA IP v18.1 LVDS SERDES Intel® FPGA IP v18.0 Intel® FPGA LVDS SERDES IP Core v17.1 Altera LVDS SERDES IP Core v17.0 Altera LVDS SERDES IP Core v14.1 Altera LVDS SERDES IP Core v14.0 Arria 10 Edition
LVDS SERDES Intel® FPGA IP Release Notes

LVDS SERDES Intel FPGA IP (intel_lvds) v23.0.0

Table 3.  v23.0.0 2023.10.02
Quartus® Prime Version Description Impact
23.3

Added automatic bytes and pins selection in the pin settings tab. Related parameter changes:

  • TX_CH_*_BYTE changed to TX_CH_*_BYTE_USR
  • TX_CH_*_PIN changed to TX_CH_*_PIN_USR
  • RX_CH_*_BYTE changed to RX_CH_*_BYTE_USR
  • RX_CH_*_PIN changed to RX_CH_*_PIN_USR
Recompilation of the IP is required.
Level Two Title