AN 741: Remote System Upgrade for MAX 10 FPGA Devices over UART with the Nios II Processor

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ID 683661
Date 2/21/2017
Public
Document Table of Contents
Document Table of Contents x
1. Remote System Upgrade for MAX 10 FPGA Devices over UART with the Nios II Processor
1. Remote System Upgrade for MAX 10 FPGA Devices over UART with the Nios II Processor x
1.1. Remote System Upgrade with MAX 10 FPGA Overview 1.2. Abbreviations 1.3. Prerequisite 1.4. Requirements 1.5. Reference Design Files 1.6. Reference Design Functional Description 1.7. Reference Design Walkthrough 1.8. Document Revision History
1.6. Reference Design Functional Description x
1.6.1. Reference Design IP Core Components 1.6.2. The Nios II EDS Software Application Design
1.6.1. Reference Design IP Core Components x
1.6.1.1. Nios II Gen2 Processor 1.6.1.2. Altera On-Chip Flash IP Core 1.6.1.3. Altera Dual Configuration IP Core 1.6.1.4. Altera UART IP Core 1.6.1.5. Generic Quad SPI Controller IP Core
1.6.2. The Nios II EDS Software Application Design x
1.6.2.1. Updating Application Images Remotely 1.6.2.2. Triggering Reconfiguration Remotely
1.7. Reference Design Walkthrough x
1.7.1. Generating Programming Files 1.7.2. Programming the QSPI 1.7.3. Programming the FPGA with Initial Image using JTAG 1.7.4. Updating Image and Triggering Reconfiguration using UART
1.7.1. Generating Programming Files x
1.7.1.1. Generating files for QSPI Programming 1.7.1.2. Generating files for Remote System Upgrade
1.7.1.2. Generating files for Remote System Upgrade x
1.7.1.2.1. .pof Generation through Convert Programming Files
1. Remote System Upgrade for MAX 10 FPGA Devices over UART with the Nios II Processor

1.7.2. Programming the QSPI

To program the Nios II application code into the QSPI flash, perform the following steps:

  1. On the MAX 10 FPGA Development Kit, switch the MAX10_BYPASSn to 0 to bypass on-board VTAP (MAX II) device.
  2. Connect the Intel FPGA Download Cable (formerly USB Blaster) to the JTAG header.
  3. In the Programmer window, click Hardware Setup and select USB Blaster.
  4. In the Mode list, select JTAG.
  5. Click Auto Detect button on the left pane.
  6. Select the device to be programmed, and click Add File.
  7. Select the pfl.sof.
  8. Click Start to start programming.
  9. After programming is successful, without turning-off the board, click Auto Detect button on the left pane again. You will see a QSPI_512Mb flash appear in the programmer window.
  10. Select the QSPI device, and click Add File.
  11. Select the .pof file generated previously from .hex file.
  12. Click Start to start programming the QSPI flash.
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