Native Loopback Accelerator Functional Unit (AFU) User Guide

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ID 683676
Date 8/05/2019
Public
Document Table of Contents
Document Table of Contents x
1. About this Document 2. The Native Loopback Accelerator Functional Unit (AFU) 3. Document Revision History for the Native Loopback Accelerator Functional Unit (AFU) User Guide
1. About this Document x
1.1. Conventions 1.2. Acronyms 1.3. Acceleration Glossary
2. The Native Loopback Accelerator Functional Unit (AFU) x
2.1. Native Loopback (NLB) AFU Overview 2.2. The NLB Sample Accelerator Function (AF) 2.3. Native Loopback Control and Status Register Descriptions 2.4. Test Modes
2.4. Test Modes x
2.4.1. FPGA Diagnostics: fpgadiag 2.4.2. NLB Mode0 Hello_FPGA Test Flow
1. About this Document
2. The Native Loopback Accelerator Functional Unit (AFU)
3. Document Revision History for the Native Loopback Accelerator Functional Unit (AFU) User Guide

3. Document Revision History for the Native Loopback Accelerator Functional Unit (AFU) User Guide

Document Version Intel® Acceleration Stack Version Changes
2019.08.05 2.0 (supported with Intel Quartus Prime Pro Edition 18.1.2) and 1.2 (supported with Intel Quartus Prime Pro Edition 17.1.1) Added support for the Intel® FPGA PAC D5005 platform in the current release.
2018.12.04 1.2 (supported with Intel® Quartus® Prime Pro Edition 17.1.1) Maintenance release.
2018.08.06 1.1 (supported with Intel® Quartus® Prime Pro Edition 17.1.1) and 1.0 (supported with Intel® Quartus® Prime Pro Edition 17.0.0)

Updated the location of the source code for the NLB sample AFU in The NLB Sample Accelerator Function (AF) section.

2018.04.11 1.0 (supported with Intel® Quartus® Prime Pro Edition 17.0.0) Initial release.
Level Two Title