Intel® Quartus® Prime Pro Edition User Guide: Partial Reconfiguration

ID 683834
Date 8/26/2022
Public

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Document Table of Contents

3.4.1. Parameters

The Partial Reconfiguration External Configuration Controller Intel® FPGA IP supports customization of the following parameters.

Table 33.   Partial Reconfiguration External Configuration Controller Parameter Settings

Parameter

Value

Description

Enable Busy Interface

On/Off

Allows you to Enable or Disable the Busy interface, which asserts a signal to indicate that PR processing is in progress during external configuration.
Figure 64. Parameter Editor