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Answers to Top FAQs
1. Intel FPGA Simulation Basics
2. Siemens EDA QuestaSim* Simulator Support
3. Synopsys VCS* and VCS MX Support
4. Aldec Active-HDL and Riviera-PRO Support
5. Cadence Xcelium* Parallel Simulator Support
6. Intel® Quartus® Prime Pro Edition User Guide Third-party Simulation Archive
A. Intel® Quartus® Prime Pro Edition User Guides
1.1. Intel FPGA Simulation Essential Elements
1.2. Overview of Simulation Tool Flow
1.3. Simulation Tool Flow
1.4. Supported Simulation Types
1.5. Supported Hardware Description Languages
1.6. Supported Simulators
1.7. Post-Fit Simulation Support by Intel FPGA Family
1.8. Intel FPGA Simulation Basics Revision History
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3.2. VCS and VCS MX Guidelines
The following guidelines apply to simulation of Intel FPGA designs in the VCS or VCS MX software:
- Do not specify the -v option for altera_lnsim.sv because it defines a systemverilog package.
- Add -verilog and +verilog2001ext+.v options to make sure all .v files are compiled as verilog 2001 files, and all other files are compiled as systemverilog files.
- Add the -lca option for Stratix® V and later families because they include IEEE-encrypted simulation files for VCS and VCS MX.
- Add -timescale=1ps/1ps to ensure picosecond resolution.