R-tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683501
Date 6/20/2022
Public

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3.2.2.5.4. VirtIO Common Configuration Structure Length Register (Address 0x015)

The length register indicates the length of the structure. The length may include padding, fields unused by the driver, or future extensions.

Table 22.  VirtIO Common Configuration Structure Length Register
Bit Location Description Access Type Default Value
31:0 Structure Length RO Settable through the IP Parameter Editor