AN 893: Hierarchical Partial Reconfiguration Tutorial: for Intel Cyclone® 10 GX FPGA Development Board

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ID 683548
Date 7/15/2019
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Document Table of Contents x
Hierarchical Partial Reconfiguration Tutorial for Intel Cyclone® 10 GX FPGA Development Board
Hierarchical Partial Reconfiguration Tutorial for Intel Cyclone® 10 GX FPGA Development Board x
Reference Design Requirements Reference Design Overview Reference Design Files Reference Design Walkthrough Document Revision History for Hierarchical Partial Reconfiguration Tutorial for Intel Cyclone® 10 GX FPGA Development Board
Reference Design Walkthrough x
Step 1: Getting Started Step 2: Creating a Child Level Sub-module Step 3: Creating Design Partitions Step 4: Allocating Placement and Routing Region for PR Partitions Step 5: Adding the Partial Reconfiguration Controller IP Step 6: Defining Personas Step 7: Creating Revisions Step 8: Compiling the Base Revision Step 9: Preparing the PR Implementation Revisions for Parent PR Partition Step 10: Preparing the PR Implementation Revisions for Child PR Partitions Step 11: Programming the Board Modifying an Existing Persona Adding a New Persona to the Design
Step 5: Adding the Partial Reconfiguration Controller IP x
Updating the Top-Level Design
Step 7: Creating Revisions x
Setting the Base Revision Type Creating Implementation Revisions
Step 11: Programming the Board x
Programming the Child PR Region Troubleshooting PR Programming Errors
Hierarchical Partial Reconfiguration Tutorial for Intel Cyclone® 10 GX FPGA Development Board

Step 4: Allocating Placement and Routing Region for PR Partitions

When you create the base revision, the PR design flow uses your PR partition region allocation to place the corresponding persona core in the reserved region. To locate and assign the PR region in the device floorplan for your base revision:

  1. Right-click the u_blinking_led_child instance in the Project Navigator and click Logic Lock Region > Create New Logic Lock Region. A lock icon appears next to the instance.
  2. In the Logic Lock Regions window, specify the placement region co-ordinates in the Origin column. The origin corresponds to the lower-left corner of the region. For example, to set a placement region with (X1 Y1) co-ordinates as (69 10), specify the Origin as X69_Y10. The Intel® Quartus® Prime software automatically calculates the (X2 Y2) co-ordinates (top-right) for the placement region, based on the height and width you specify.
    Note: This tutorial uses the (X1 Y1) co-ordinates - (69 10), and a height and width of 10 for the placement region. You can define any value for the placement region, provided that the region covers the blinking_led_child logic.
  3. Enable the Reserved and Core-Only options.
  4. Double-click the Routing Region option. The Logic Lock Routing Region Settings dialog box appears.
  5. Select Fixed with expansion for the Routing type. Selecting this option automatically assigns an expansion length of 1.
    Note: The routing region must be larger than the placement region, to provide extra flexibility for the Fitter when the engine routes different personas.
  6. Repeat steps 1-5 for the u_blinking_led instance. The parent-level placement region must fully enclose the corresponding child-level placement and routing regions, while allowing sufficient space for the parent-level logic placement. For this tutorial, specify the Origin as X66 Y7, a Height of 27, and Width of 16 for the placement region of the u_blinking_led instance.
    Figure 7.  Logic Lock Regions Window
  7. To ensure reliable operation with PR and EDCRC, create a floorplan assignment to reserve the unusable device resources at row Y=59. Use the Logic Lock Regions Window to define an empty reserved region, or add the following .qsf assignment:
    set_instance_assignment -name EMPTY_PLACE_REGION "X0 Y59 X102 Y59-R\
     :C-empty_region" -to |
    Figure 8. Empty Reserved Region

Verify that the blinking_led.qsf contains the following assignments, corresponding to your floorplanning: 

set_instance_assignment -name PLACE_REGION "X69 Y10 X78 Y19" -to \
     u_blinking_led|u_blinking_led_child
set_instance_assignment -name RESERVE_PLACE_REGION ON -to \
    u_blinking_led|u_blinking_led_child
set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to \
     u_blinking_led|u_blinking_led_child
set_instance_assignment -name ROUTE_REGION "X68 Y9 X79 Y20" -to \
     u_blinking_led|u_blinking_led_child
set_instance_assignment -name PLACE_REGION "X66 Y7 X92 Y22" -to u_blinking_led
set_instance_assignment -name RESERVE_PLACE_REGION ON -to u_blinking_led
set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to u_blinking_led
set_instance_assignment -name ROUTE_REGION "X65 Y6 X93 Y23" -to u_blinking_led
set_instance_assignment -name EMPTY_PLACE_REGION "X0 Y59 X102 Y59-\
     R:C-empty_region" -to |
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