Intel® MAX® 10 FPGA (10M08S, 144-EQFP) Evaluation Kit User Guide

Download PDF
ID 812857
Date 1/08/2023
Public
Document Table of Contents
Document Table of Contents x
1. Overview 2. Getting Started 3. Board Components 4. Document Revision History for Intel® MAX® 10 FPGA (10M08S, 144-EQFP) Evaluation Kit User Guide A. Additional Information
1. Overview x
1.1. Board Component Blocks 1.2. Supported Items Not Included with the Kit
2. Getting Started x
2.1. Powering the Kit 2.2. Installing the Intel® FPGA Download Cable Driver 2.3. Handling the Kit 2.4. Factory Default Switch and Jumper Settings
3. Board Components x
3.1. Board Overview 3.2. Featured Device: Intel® MAX® 10 FPGA 3.3. Configuration 3.4. Clock Circuitry 3.5. Arduino Connectors 3.6. General User Input/Output 3.7. Power Supply
3.3. Configuration x
3.3.1. FPGA Programming over External Intel® FPGA Download Cable 3.3.2. Configuring the FPGA Using the Intel® Quartus® Prime Programmer 3.3.3. Selecting Internal Configuration Scheme 3.3.4. Generating a .pof File with ICB Settings 3.3.5. Programming Internal Flash Memory
3.4. Clock Circuitry x
3.4.1. General-Purpose Clock
3.6. General User Input/Output x
3.6.1. User-Defined DIP Switch 3.6.2. User-Defined LEDs
3.7. Power Supply x
3.7.1. Power Measurement 3.7.2. Power Distribution System 3.7.3. Temperature Sense
A. Additional Information x
A.1. Safety and Regulatory Information A.2. Compliance Information
A.1. Safety and Regulatory Information x
A.1.1. Safety Warnings A.1.2. Safety Cautions
1. Overview
2. Getting Started
3. Board Components
4. Document Revision History for Intel® MAX® 10 FPGA (10M08S, 144-EQFP) Evaluation Kit User Guide
A. Additional Information

3.7.3. Temperature Sense

The ADCs provide the devices with built-in capability for on-die temperature monitoring and external analog signal conversion.

Temperature sensing mode—monitors external temperature data input with a sampling rate of up to 50 kilosamples per second. In dual ADC devices, only the first ADC block contains the temperature sensing diode.

For more information on the ADC, refer to the Intel® MAX® 10 FPGA Device Overview.

Related Information
Level Two Title