Intel® Quartus® Prime Pro Edition User Guide: Design Recommendations

ID 683082
Date 3/28/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.5.6. Design Assistant Rule Categories

Each Design Assistant rule has a unique alphanumeric ID that reflects the rule category. You can enable or disable Design Assistant rules for specific stages of compilation. The following lists all categories of Design Assistant rules, and provides a link to rule documentation in Intel® Quartus® Prime Help. Some categories are device-specific.
Table 7.  Design Assistant Rule Categories
Rule Category and Help Link Acronym Description
Block Based Design Rules BBD Rule checks for block based design and partial reconfiguration
Clock Domain Crossing Rules CDC Rule checks for clock domain crossings
Clock Rules CLK Rule checks for clocks
Floorplanning Rules FLP Rule checks for floorplanning, such as Logic Lock regions and congestion
Linting Rules LNT Rules checks of source code for programmatic and stylistic errors
Project Rules PRJ Rule checks related to Intel® Quartus® Prime projects
Reset Domain Crossing RDC Rule checks for reset domain crossings
Reset Rules RES Rule checks for resets
Timing Closure Rules TMC Rule checks for timing closure