AN 456: PCI Express High Performance Reference Design

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ID 683541
Date 12/12/2018
Public
Document Table of Contents
Document Table of Contents x
1. PCI Express High Performance Reference Design
1. PCI Express High Performance Reference Design x
1.1. Understanding Throughput in PCI Express 1.2. Deliverables Included with the Reference Design 1.3. Reference Design Functional Description 1.4. Hardware Requirements 1.5. Software Requirements 1.6. Software Installation 1.7. Hardware Installation 1.8. Running the Software Application 1.9. Additional Chaining DMA Commands 1.10. Using SignalTap II 1.11. Performance Benchmarking Results 1.12. Document Revision History
1.1. Understanding Throughput in PCI Express x
1.1.1. Protocol Overhead 1.1.2. Throughput for Posted Writes 1.1.3. Throughput for Reads
1.3. Reference Design Functional Description x
1.3.1. File Naming Conventions 1.3.2. Project Hierarchy
1.7. Hardware Installation x
1.7.1. Programming using the .sof File
1. PCI Express High Performance Reference Design

1.2. Deliverables Included with the Reference Design

The reference design includes the following components:
  • Software application and Windows driver configured specifically for this reference design
  • FPGA programming files for the Arria II GX FPGA Development Kit for x1, x4, and x8 Gen1 operation
  • FPGA programming files for the Cyclone IV GX FPGA Development Kit for x1 and x4 Gen1 operation
  • FPGA programming files for the Stratix IV GX FPGA Development Kit for x1, x4, and x8 Gen1 and Gen2 operation
  • FPGA programming files for Arria V GT FPGA Development Kit for x1 and x4 Gen1 and Gen2 operation. Also included are x8 Gen1 programming files
  • FPGA programming files for Cyclone V GT FPGA Development Kit for x1 and x4 Gen1 operation
  • FPGA programming files for Stratix V GX FPGA Development Kit for x1, x4 and x8 Gen1 and Gen2 operation. Also x1 and x4 Gen3 andx1 programming files are included
  • FPGA programming files for Arria 10 GX FPGA Development Kit for x1 Gen1, x8 Gen2, and x4 Gen3
  • Quartus® II Archives Files (.qar) for the development boards and configurations, including SRAM Object File (.sof), Programmer Object File (.pof), and SignalTap® II Files (.stp)
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