Visible to Intel only — GUID: iga1438035639555
Ixiasoft
5.6.2. JTAG Chain Control DIP Switch
The JTAG chain control DIP switch (SW3) either removes or includes devices in the active JTAG chain.
The SW3 switch select controls the JTAG master/slave select. The DIP switch MSTR switches control the master select. The other 5 pins are bypass pins for the various available JTAG slaves. The following slaves are available and can be bypassed by moving the corresponding bypass switch to the 'ON' position.
Switch 3 Bit | Board Label | Function |
---|---|---|
1 | Intel® Arria® 10 | ON- Intel® Arria® 10 JTAG Bypass OFF- Intel® Arria® 10 JTAG Enable |
2 | I/O MAX V | ON- MAXV JTAG Bypass OFF- MAXV JTAG Enable |
3 | FMCA | ON- FMCA JTAG Bypass OFF- FMCA JTAG Enable |
4 | FMCB | ON- FMCB JTAG Bypass OFF- FMCB JTAG Enable |
5 | PCIe | ON- PCIe* JTAG Bypass OFF- PCIe* JTAG Enable |
6 | MSTR[0] | Refer to Table 23 |
7 | MSTR[1] | Refer to Table 23 |
8 | MSTR[2] | Refer to Table 23 |
The MSTR switch settings and their meanings can be seen in the table below.
MSTR2 | MSTR1 | MSTR0 | Modes |
---|---|---|---|
ON | ON | ON | BOOT |
OFF | ON | ON | FMCA JTAG Master |
ON | OFF | ON | FMCB JTAG Master |
ON | ON | OFF | FTRACE JTAG Master |
OFF | OFF | OFF | On-Board Intel® FPGA Download Cable II JTAG Master |
ON | OFF | OFF | System Configuration Mode |
OFF | ON | OFF | GUI Test Mode |
OFF | OFF | ON | Reserved |
The bypass switch settings dictate which slaves are in/out of the chain, but see below for the order if all were enabled in the chain.
- Intel® Arria® 10
- IO_MAXV
- PCIe*
- FMCA
- FMCB