Video and Vision Processing Suite Intel® FPGA IP User Guide

ID 683329
Date 12/12/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents
1. About the Video and Vision Processing Suite 2. Getting Started with the Video and Vision Processing IPs 3. Video and Vision Processing IPs Functional Description 4. Video and Vision Processing IP Interfaces 5. Video and Vision Processing IP Registers 6. Video and Vision Processing IPs Software Programming Model 7. Protocol Converter Intel® FPGA IP 8. 3D LUT Intel® FPGA IP 9. AXI-Stream Broadcaster Intel® FPGA IP 10. Chroma Key Intel® FPGA IP 11. Chroma Resampler Intel® FPGA IP 12. Clipper Intel® FPGA IP 13. Clocked Video Input Intel® FPGA IP 14. Clocked Video to Full-Raster Converter Intel® FPGA IP 15. Clocked Video Output Intel® FPGA IP 16. Color Space Converter Intel® FPGA IP 17. Deinterlacer Intel® FPGA IP 18. FIR Filter Intel® FPGA IP 19. Frame Cleaner Intel® FPGA IP 20. Full-Raster to Clocked Video Converter Intel® FPGA IP 21. Full-Raster to Streaming Converter Intel® FPGA IP 22. Genlock Controller Intel® FPGA IP 23. Generic Crosspoint Intel® FPGA IP 24. Genlock Signal Router Intel® FPGA IP 25. Guard Bands Intel® FPGA IP 26. Interlacer Intel® FPGA IP 27. Mixer Intel® FPGA IP 28. Pixels in Parallel Converter Intel® FPGA IP 29. Scaler Intel® FPGA IP 30. Stream Cleaner Intel® FPGA IP 31. Switch Intel® FPGA IP 32. Tone Mapping Operator Intel® FPGA IP 33. Test Pattern Generator Intel® FPGA IP 34. Video Frame Buffer Intel® FPGA IP 35. Video Streaming FIFO Intel® FPGA IP 36. Video Timing Generator Intel® FPGA IP 37. Warp Intel® FPGA IP 38. Design Security 39. Document Revision History for Video and Vision Processing Suite User Guide

27.2. Mixer IP Parameters

The Mixer IP offers run-time and compile-time parameters.
Table 406.  Mixer IP Parameters
Parameter Value Description
Video data format
Lite mode On or off Turn on to use the lite variant of the Intel FPGA Streaming Video protocol.
Bits per color sample 8 to 16 Select the number of bits per color sample.
Number of color planes 1 to 4 Select the number of pixels transmitted every clock cycle at the input interface.
Number of pixels in parallel 1 to 8 Select the number of pixels transmitted every clock cycle at the output interface.
Control settings
Memory-mapped control interface On or off Turn on to enable the Avalon memory-mapped control agent interface and allow runtime configuration via the register map. You must have the Avalon memory-mapped control agent interface if you turn on Lite mode.
Algorithm settings
Number of layers 2 to 8 Total number of mixers layers, including the base layer (layer 0).
Do rounding On or off Turn on to apply round-half-up logic at the end of the alpha blending mathematics for each layer. If this feature is not enabled then all fraction bits are cropped without rounding.
Layer 1: Use restricted offsets On or off Turn on for the restricted offsets for mixer layer 1.
Layer 1: Alpha blending mode No blending, Alpha from command, Alpha from data, Alpha from command or data Set the alpha blending mode for mixer layer 1.
Layer 2: Use restricted offsets On or off Turn on for the restricted offsets for mixer layer 2.
Layer 2: Alpha blending mode No blending, Alpha from command, Alpha from data, Alpha from command or data Set the alpha blending mode for mixer layer 2.
Layer 3: Use restricted offsets On or off Turn on for the restricted offsets for mixer layer 3.
Layer 3: Alpha blending mode No blending, Alpha from command, Alpha from data, Alpha from command or data Set the alpha blending mode for mixer layer 3.
Layer 4: Use restricted offsets On or off Turn on for the restricted offsets for mixer layer 4.
Layer 4: Alpha blending mode No blending, Alpha from command, Alpha from data, Alpha from command or data Set the alpha blending mode for mixer layer 4.
Layer 5: Use restricted offsets On or off Turn on for the restricted offsets for mixer layer 5.
Layer 5: Alpha blending mode No blending, Alpha from command, Alpha from data, Alpha from command or data Set the alpha blending mode for mixer layer 5.
Layer 6: Use restricted offsets On or off Turn on for the restricted offsets for mixer layer 6.
Layer 6: Alpha blending mode No blending, Alpha from command, Alpha from data, Alpha from command or data Set the alpha blending mode for mixer layer 6.
Layer 7: Use restricted offsets On or off Turn on for the restricted offsets for mixer layer 7.
Layer 7: Alpha blending mode No blending, Alpha from command, Alpha from data, Alpha from command or data Set the alpha blending mode for mixer layer 7.
General
Extra pipeline level 0 to 3 Set the number of additional register stages to add the pipeline.
Debug features On or off Turn on for readback of writeable registers via the control agent interface.
Separate clock for control interface On or off Turn on for a separate clock for the control agent interface.