Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 8/28/2023
Public
Document Table of Contents

10.3.13.1. Functional Description

The global timer is accessible by the processors using memory‑mapped access through the SCU. The global timer has the following features:

  • 64‑bit incrementing counter with an auto-incrementing feature. It continues incrementing after sending interrupts.
  • Memory‑mapped in the private memory region.
  • Accessed at reset in Secure State only. It can only be set once, but secure code can read it at any time.
  • Accessible to both Cortex* -A9 processors in the MPCore.
  • Clocked by mpu_periph_clk, running at ¼ the rate of mpu_clk.