Intel® Quartus® Prime Pro Edition User Guide: Platform Designer

ID 683609
Date 9/26/2022
Public

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2.17.2. Simulating Software Running on a Nios® II Processor

To simulate the software in a system driven by a Nios® II processor, generate the simulation model for the Platform Designer testbench system with the following steps:
  1. Click Generate > Generate Testbench System.
  2. In the Generation dialog box, select Simple, BFMs for clocks and resets.
  3. For Create testbench simulation model, select Verilog or VHDL.
  4. Click Generate.
  5. Open the Nios® II Software Build Tools for Eclipse.
  6. Set up an application project and board support package (BSP) for the <system>.sopcinfo file.
  7. To simulate, right-click the application project in Eclipse, and then click Run as > Nios® II ModelSim* . This command prepares the ModelSim* simulation environment, and compiles and loads the Nios® II software simulation.
  8. To run the simulation in ModelSim* , type run -all in the ModelSim* transcript window.
  9. Set the ModelSim* settings and select the Platform Designer Testbench Simulation Package Descriptor (.spd) file, < system >_tb.spd. The .spd file generates with the testbench simulation model for Nios® II processor designs, and specifies the files you require for Nios® II processor simulation.
Note: Refer to the Nios® V Processor Quick Start Guide for information on simulating Nios® V processor designs.